net: an RTL8139 driver, and the e1000 stops refusing the PCIe parts
Two NICs, and unlike the RTL8111 last commit, QEMU emulates both -- so both are tested rather than reasoned about. **RTL8139** is its own driver and not a mode of the 8169, because it is its own chip. No descriptor rings: the receiver is one circular buffer the chip writes packets into back to back behind four-byte headers, and the transmitter is four fixed slots. Putting both programming models behind one set of function pointers is how a mode flag ends up threaded through every path. Three details are the whole driver. CAPR runs sixteen bytes behind the true read position -- a quirk of the part, not an off-by-one. WRAP means the chip runs a packet past the end of the buffer rather than splitting it, so the 8 KB buffer is allocated as 8 KB + 16 + one maximum frame; getting that wrong is a chip writing past its allocation at line rate. And a length field of 0xFFF0 means "still writing this one", so treating it as a length copies a partial packet and loses the alignment for everything after it. **The e1000 now matches the PCIe 8257x parts.** Its header refused them, with a note saying they "differ in NVM access and initialisation, and claiming a device this driver has not been shown to initialise is worse than not claiming it". That was right, and the second half is answerable: QEMU emulates the 82574L, so it can be *shown* to initialise. What differs turned out to be one register. EERD moved its address field from bits 8-15 to bits 2-15 and its done bit from 4 to 1; the rings, RCTL, TCTL and ICR are identical. So there is a per-instance flag for the NVM layout and seven more ids -- not a second copy of four hundred lines of ring code. The wrong pair of constants fails silently, reading the wrong word or waiting for a bit that never sets, and the MAC comes out as zeroes; that is why it is named in the header rather than papered over. Still refused: the ICH/PCH parts (82562, 82577-82579, I217-I219), which put the PHY behind a MAC-PHY interconnect and need a different bring-up nothing here can test. Tested, each booted alone: rtl8139 (10ec:8139) and 82574L (8086:10d3) both bind, read a real MAC, complete DHCP and ping 4 of 4 with no loss. The classic 82540EM does the same, which is the regression that mattered for the NVM change. Both supported display configurations: one boot each, no traps, no panics, socktest and memfdtest green. Also recorded: the Chromebox CN62 carries an RTL8111, not an Intel part, so last commit's driver covers it too. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
This commit is contained in:
Nexoniarz
parent
4a723cfc0e
commit
0331d548c4
6 changed files with 530 additions and 8 deletions
403
kernel/drivers/net/rtl8139/rtl8139.c
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403
kernel/drivers/net/rtl8139/rtl8139.c
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// Realtek RTL8139 Fast Ethernet.
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//
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// The other Realtek, and a genuinely different chip from the RTL8111 next
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// door despite the neighbouring name. The 8139 has no descriptor rings: the
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// receiver is **one circular buffer** the chip writes packets into back to
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// back, each behind a four-byte header, and the transmitter is **four fixed
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// slots** used round-robin. Sharing a driver with the 8169 would mean two
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// programming models behind one set of function pointers, which is how a
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// driver ends up with a mode flag threaded through every path.
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//
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// It is here for two reasons. It is what a great many older machines have --
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// and it is the one Realtek part QEMU emulates, so unlike the 8169 beside it
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// every line of this has been run.
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#include "types.h"
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#include "defs.h"
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#include "param.h"
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#include "x86.h"
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#include "spinlock.h"
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#include "sleeplock.h"
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#include "fs.h"
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#include "file.h"
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#include "memlayout.h"
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#include "mmu.h"
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#include "pci.h"
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#include "device.h"
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#include "netdev.h"
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#include "dma.h"
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#include "irq.h"
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// --- registers --------------------------------------------------------------
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#define R_IDR0 0x00 // station address
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#define R_MAR0 0x08 // multicast filter
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#define R_TSD0 0x10 // four transmit status registers
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#define R_TSAD0 0x20 // four transmit buffer addresses
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#define R_RBSTART 0x30 // receive buffer, 32-bit physical
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#define R_CR 0x37 // command
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#define R_CAPR 0x38 // how far the driver has read
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#define R_CBR 0x3A // how far the chip has written
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#define R_IMR 0x3C
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#define R_ISR 0x3E
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#define R_TCR 0x40
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#define R_RCR 0x44
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#define R_9346CR 0x50
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#define R_CONFIG1 0x52
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#define R_MSR 0x58 // media status
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#define CR_RST 0x10
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#define CR_RE 0x08
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#define CR_TE 0x04
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#define CR_BUFE 0x01 // receive buffer empty
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#define TSD_OWN 0x00002000 // the chip has taken the data
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#define TSD_TOK 0x00008000 // and put it on the wire
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#define TSD_SIZE 0x00001FFF
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#define ISR_ROK 0x0001
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#define ISR_RER 0x0002
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#define ISR_TOK 0x0004
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#define ISR_TER 0x0008
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#define ISR_RXOVW 0x0010
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#define ISR_LINKCHG 0x0020
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#define ISR_FOVW 0x0040
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#define MSR_LINKB 0x04 // link *bad* -- the sense is inverted
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// Accept our own address, broadcast and multicast; no promiscuous. WRAP lets
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// the chip run a packet past the end of the buffer rather than splitting it,
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// which is why the allocation below is larger than the buffer length it
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// declares. MXDMA and RXFTH are both "unlimited".
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#define RCR_APM 0x00000002
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#define RCR_AM 0x00000004
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#define RCR_AB 0x00000008
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#define RCR_WRAP 0x00000080
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#define RCR_RBLEN_8K 0x00000000
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#define RCR_UNLIMITED 0x0000E700
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// 8 KB of buffer, 16 bytes the chip requires past it, and one maximum frame of
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// slack because WRAP is set. Getting this last part wrong is a chip writing
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// over whatever follows the allocation, at line rate.
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#define RXBUF_LEN 8192
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#define RXBUF_PAD 16
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#define RXBUF_SLACK 1536
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#define RXBUF_TOTAL (RXBUF_LEN + RXBUF_PAD + RXBUF_SLACK)
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#define NTX 4
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#define TXBUF 2048
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#define RTL8139_MAX_NICS 2
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struct rtl8139 {
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volatile uint8 *mmio;
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uint8 *rxbuf, *txbuf;
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uint64 rxbuf_phys, txbuf_phys;
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int rx_ptr; // our offset into the circular buffer
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int tx_slot; // the next of the four to use
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uint8 mac[6];
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int ready;
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uint64 rx_packets, tx_packets;
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struct spinlock lock;
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struct pci_dev *pdev;
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struct device *ndev;
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};
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static struct rtl8139 nics[RTL8139_MAX_NICS];
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static struct rtl8139 *
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of(struct device *d)
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{
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return d ? (struct rtl8139 *)d->priv : 0;
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}
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static inline uint8 rd8 (struct rtl8139 *r, int o) { return *(volatile uint8 *)(r->mmio + o); }
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static inline uint16 rd16(struct rtl8139 *r, int o) { return *(volatile uint16 *)(r->mmio + o); }
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static inline uint32 rd32(struct rtl8139 *r, int o) { return *(volatile uint32 *)(r->mmio + o); }
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static inline void wr8 (struct rtl8139 *r, int o, uint8 v) { *(volatile uint8 *)(r->mmio + o) = v; }
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static inline void wr16(struct rtl8139 *r, int o, uint16 v) { *(volatile uint16 *)(r->mmio + o) = v; }
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static inline void wr32(struct rtl8139 *r, int o, uint32 v) { *(volatile uint32 *)(r->mmio + o) = v; }
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// --- the class ops ----------------------------------------------------------
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static const unsigned char *
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rtl8139_mac_op(struct device *d)
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{
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struct rtl8139 *r = of(d);
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static const unsigned char zero[6];
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return r ? r->mac : zero;
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}
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static int
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rtl8139_link_up(struct device *d)
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{
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struct rtl8139 *r = of(d);
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// LINKB is set when the link is *down*. Reading it the obvious way round is
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// a driver that reports a cable as unplugged whenever it is plugged in.
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return r ? (rd8(r, R_MSR) & MSR_LINKB) == 0 : 0;
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}
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static int
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rtl8139_transmit(struct device *d, const void *frame, int len)
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{
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struct rtl8139 *r = of(d);
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int slot;
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uint32 tsd;
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if (!r || !r->ready)
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return -1;
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if (len <= 0 || len > TXBUF)
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return -1;
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acquire(&r->lock);
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slot = r->tx_slot;
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tsd = rd32(r, R_TSD0 + slot * 4);
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// A slot is ours again once the chip has taken the data (OWN) -- not once it
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// has reached the wire. Waiting for TOK instead would idle three quarters of
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// the transmitter for no benefit.
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if (r->tx_packets >= NTX && !(tsd & TSD_OWN)) {
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release(&r->lock);
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return -1; // all four busy: congestion, so retry
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}
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// Ethernet's minimum is 60 bytes before the FCS and this chip does not pad.
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// An ARP request is 42, so a driver that skips this cannot resolve anything.
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int n = len < 60 ? 60 : len;
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memmove(r->txbuf + (uint64)slot * TXBUF, frame, len);
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if (n > len)
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memset(r->txbuf + (uint64)slot * TXBUF + len, 0, n - len);
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wr32(r, R_TSAD0 + slot * 4, (uint32)(r->txbuf_phys + (uint64)slot * TXBUF));
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__sync_synchronize();
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// Writing the size is what starts it: this clears OWN, and the chip sets OWN
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// again when it has the data. The early-transmit threshold in bits 16-21 is
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// left at zero, which means "start when the whole frame is in the FIFO" --
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// the safe end of a trade whose other end is underruns.
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wr32(r, R_TSD0 + slot * 4, (uint32)n);
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r->tx_slot = (slot + 1) % NTX;
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r->tx_packets++;
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release(&r->lock);
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return 0;
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}
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static int
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rtl8139_receive(struct device *d, void *out, int cap)
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{
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struct rtl8139 *r = of(d);
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uint32 hdr;
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int status, len, avail;
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if (!r || !r->ready)
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return 0;
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acquire(&r->lock);
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if (rd8(r, R_CR) & CR_BUFE) { // nothing waiting
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release(&r->lock);
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return 0;
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}
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// The four-byte header the chip writes in front of every packet: status in
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// the low half, length in the high half. The length counts the 4-byte CRC.
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hdr = *(volatile uint32 *)(r->rxbuf + r->rx_ptr);
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status = (int)(hdr & 0xFFFF);
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len = (int)((hdr >> 16) & 0xFFFF);
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// 0xFFF0 is the chip saying "still writing this one". Treating it as a
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// length is a driver that copies a partial packet and then loses the buffer
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// alignment for everything after it.
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if (len == 0xFFF0 || len == 0) {
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release(&r->lock);
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return 0;
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}
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if (!(status & 0x0001) || len < 8 || len > RXBUF_LEN) {
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// A bad frame. Resynchronise rather than try to skip it: the length is
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// the only thing that says where the next one starts, and it is the field
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// that is not to be trusted here.
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wr8(r, R_CR, CR_TE); // stop the receiver
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r->rx_ptr = 0;
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wr32(r, R_RBSTART, (uint32)r->rxbuf_phys);
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wr16(r, R_CAPR, (uint16)(0 - RXBUF_PAD));
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wr8(r, R_CR, CR_RE | CR_TE);
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release(&r->lock);
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return 0;
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}
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avail = len - 4; // drop the CRC the stack does not want
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if (avail > cap)
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avail = cap;
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// The copy may run past the end of the 8 KB window, which is exactly what
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// WRAP is for and why the allocation has a frame of slack: the bytes are
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// there, contiguously, so one memmove is correct.
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if (avail > 0)
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memmove(out, r->rxbuf + r->rx_ptr + 4, avail);
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// Four-byte align the next offset, wrap it, and tell the chip how far we
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// have read. CAPR is *sixteen behind* the true position -- a quirk of the
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// part, not an off-by-one.
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r->rx_ptr = (r->rx_ptr + len + 4 + 3) & ~3;
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r->rx_ptr %= RXBUF_LEN;
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wr16(r, R_CAPR, (uint16)(r->rx_ptr - RXBUF_PAD));
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r->rx_packets++;
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release(&r->lock);
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return avail;
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}
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// --- interrupt --------------------------------------------------------------
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static void
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rtl8139_intr(void *arg)
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{
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struct rtl8139 *r = arg;
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uint16 isr;
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if (!r || !r->mmio)
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return;
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isr = rd16(r, R_ISR);
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if (!isr)
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return;
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wr16(r, R_ISR, isr); // write-1-to-clear, or it re-enters
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// As with every other NIC here: nothing is read from the buffer in interrupt
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// context. This only ends the network thread's wait early.
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if (isr & (ISR_ROK | ISR_RXOVW | ISR_FOVW))
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netdev_rx_signal();
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}
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// --- probe ------------------------------------------------------------------
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static int
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rtl8139_probe(struct pci_dev *d)
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{
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struct rtl8139 *r = 0;
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uint64 bar = 0, barlen = 0;
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for (int i = 0; i < RTL8139_MAX_NICS; i++)
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if (!nics[i].ready) { r = &nics[i]; break; }
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if (!r)
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return -1;
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// The first memory BAR. BAR 0 is I/O on this part and BAR 1 is the same
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// registers in memory space; using memory keeps this the same shape as
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// every other driver here.
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for (int i = 0; i < 6; i++)
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if (d->bar[i].base && !d->bar[i].is_io) {
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bar = d->bar[i].base;
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barlen = d->bar[i].size;
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break;
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}
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if (!bar) {
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cprintf("rtl8139: no memory BAR; not driving this device\n");
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return -1;
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}
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r->pdev = d;
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initlock(&r->lock, "rtl8139");
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pci_enable(d, PCI_CMD_MEMORY | PCI_CMD_BUS_MASTER);
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r->mmio = ioremap(bar, barlen ? barlen : 0x100);
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if (!r->mmio) {
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cprintf("rtl8139: cannot map registers at %p\n", (void *)bar);
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return -1;
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}
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// Wake the chip if the firmware left it asleep, then reset.
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wr8(r, R_CONFIG1, 0x00);
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wr8(r, R_CR, CR_RST);
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for (int i = 0; i < 10000; i++) {
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microdelay(10);
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if (!(rd8(r, R_CR) & CR_RST))
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break;
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}
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if (rd8(r, R_CR) & CR_RST) {
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cprintf("rtl8139: the chip did not come out of reset\n");
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return -1;
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}
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for (int i = 0; i < 6; i++)
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r->mac[i] = rd8(r, R_IDR0 + i);
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r->rxbuf = dma_alloc(RXBUF_TOTAL, 8);
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r->txbuf = dma_alloc(NTX * TXBUF, 8);
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if (!r->rxbuf || !r->txbuf) {
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cprintf("rtl8139: no DMA memory for the buffers\n");
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return -1;
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}
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r->rxbuf_phys = dma_phys(r->rxbuf);
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r->txbuf_phys = dma_phys(r->txbuf);
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memset(r->rxbuf, 0, RXBUF_TOTAL);
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// A 32-bit part: the buffer address register is 32 bits and there is no
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// dual-address cycle to fall back on. The DMA arena is below 4 GB, so this
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// holds -- but it holds for a reason rather than by luck, and if the arena
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// ever moves this is where it breaks.
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if (r->rxbuf_phys + RXBUF_TOTAL > 0xFFFFFFFFULL ||
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r->txbuf_phys + NTX * TXBUF > 0xFFFFFFFFULL) {
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cprintf("rtl8139: buffers above 4 GB; this chip cannot reach them\n");
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return -1;
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}
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wr32(r, R_RBSTART, (uint32)r->rxbuf_phys);
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r->rx_ptr = 0;
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wr16(r, R_CAPR, (uint16)(0 - RXBUF_PAD));
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wr32(r, R_RCR, RCR_APM | RCR_AM | RCR_AB | RCR_WRAP |
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RCR_RBLEN_8K | RCR_UNLIMITED);
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wr32(r, R_TCR, 0x00000700); // unlimited DMA burst
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wr32(r, R_MAR0, 0xFFFFFFFF); // multicast: everything; the stack filters
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wr32(r, R_MAR0 + 4, 0xFFFFFFFF);
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wr8(r, R_CR, CR_RE | CR_TE);
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wr16(r, R_ISR, 0xFFFF);
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wr16(r, R_IMR, ISR_ROK | ISR_RER | ISR_TOK | ISR_TER |
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ISR_RXOVW | ISR_FOVW | ISR_LINKCHG);
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if (d->irq != 0xFF && d->irq < 24)
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irq_register(d->irq, rtl8139_intr, r, "rtl8139", 1);
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r->ready = 1;
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kinfo("rtl8139: %x:%x:%x:%x:%x:%x, %s, irq %d\n",
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r->mac[0], r->mac[1], r->mac[2], r->mac[3], r->mac[4], r->mac[5],
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(rd8(r, R_MSR) & MSR_LINKB) ? "link down" : "link up", d->irq);
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return 0;
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}
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static void
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rtl8139_attached(struct pci_dev *d, struct device *dev)
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{
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for (int i = 0; i < RTL8139_MAX_NICS; i++)
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if (nics[i].ready && nics[i].pdev == d) {
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dev->priv = &nics[i];
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nics[i].ndev = dev;
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return;
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}
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}
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static const struct netdev_ops rtl8139_netdev_ops = {
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.transmit = rtl8139_transmit,
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.receive = rtl8139_receive,
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.mac = rtl8139_mac_op,
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.link_up = rtl8139_link_up,
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};
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static const struct pci_match rtl8139_match[] = {
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{ 0x10EC, 0x8139, 0, 0 },
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{ 0, 0, 0, 0 },
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};
|
||||
|
||||
const struct pci_driver rtl8139_driver = {
|
||||
.name = "rtl8139",
|
||||
.devname = "eth",
|
||||
.match = rtl8139_match,
|
||||
.ops = &rtl8139_netdev_ops,
|
||||
.probe = rtl8139_probe,
|
||||
.attached = rtl8139_attached,
|
||||
};
|
||||
Loading…
Reference in a new issue