Linux's own r8169 through LDLS, deep idle, and the GPU plan
The RTL8168 is now driven by Linux's r8169, unmodified, in a process. `make ldls-r8169` stages it from the running kernel together with libphy, mdio-bus, mdio_devres and the Realtek PHY driver, the kernel's BTF and the RTL PHY firmware, and etc/schinit/ldls-r8169.job starts it at boot with its log in /var/log/ldls-r8169.log. The native driver is out of the registry; its code, now with Linux's 8168H setup, stays as the fallback. LDLS grows what that needed: - ldlsd loads a comma-separated module set in dependency order, each linking against the ones before it, with BTF read before any init_module runs; - a driver core (bus match, driver probe), devres, kernel printf, real udelay/msleep/ktime and 1000 Hz jiffies, phylib's bitmaps and link_mode_params, firmware from /lib/firmware, and the symbols whose stub zero was a lie (list validity, try_module_get, dev_err_probe, eth_platform_get_mac_address); - pdev->bus is a real pci_bus, and cmovcc from per-CPU memory is rewritten like the other %gs forms. In QEMU all five modules load, link and initialise, and r8169 registers and finds no device. Probe and traffic are untested until real hardware. The kernel turns ASPM off on Realtek NIC links at boot, as r8169 does through pci_disable_link_state, which a process cannot. Idle CPUs enter ACPI _CST's C2 (CC6 on Zen) by port read or MWAIT when the APIC timer keeps running, instead of only ever halting at C1. docs/plan/gpu.md: amdgpu and nouveau through LDLS, with measurements. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01S1giNvrHTrPMPw7V6x1kQ4
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18 changed files with 1945 additions and 81 deletions
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@ -41,6 +41,7 @@ static int ready;
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static int s5_typ_a = -1, s5_typ_b = -1;
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static uacpi_interrupt_ret power_button(uacpi_handle ctx);
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static void cstate_find(void);
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void
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acpi_aml_init(void)
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@ -98,6 +99,7 @@ acpi_aml_init(void)
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}
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ready = 1;
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kinfo("acpi: namespace loaded\n");
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cstate_find();
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}
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// --- power -------------------------------------------------------------------
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@ -526,3 +528,111 @@ acpi_psu_get(int i, struct acpi_psu *b)
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}
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return 0;
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}
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// --- idle states --------------------------------------------------------------
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//
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// An idle CPU used to run hlt and nothing else. hlt is C1: the core stops
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// executing and stays powered. The states below it -- CC6 on Zen, C3 and
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// deeper on Intel -- switch the core off, and the firmware lists how to reach
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// them in each processor's _CST. Without them a laptop sitting at a shell
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// keeps every core warm and the fans going.
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//
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// _CST is a count followed by one package per state: a register (a Generic
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// Register descriptor in a buffer), a type (1 = C1, 2 = C2, 3 = C3), the
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// worst-case wake-up latency in microseconds, and the power. A register in
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// system I/O space is entered by reading it; one in functional fixed hardware
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// is MWAIT, with the hint in the address.
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//
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// Only types 1 and 2 are taken. C3 asks the OS to stop bus-master activity
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// or flush caches first (ACPI 8.1.4), which this does not do.
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struct acpi_idle acpi_idle;
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static int cst_done;
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static void
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cst_parse(uacpi_namespace_node *node)
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{
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uacpi_object *o = 0;
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uacpi_object_array p, e;
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uacpi_data_view d;
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if (uacpi_eval_package(node, "_CST", 0, &o) != UACPI_STATUS_OK)
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return;
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if (uacpi_object_get_package(o, &p) == UACPI_STATUS_OK) {
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for (uacpi_size i = 1; i < p.count; i++) {
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if (uacpi_object_get_package(p.objects[i], &e) != UACPI_STATUS_OK ||
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e.count < 4)
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continue;
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uint32 type = pkg_int(&e, 1), lat = pkg_int(&e, 2);
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if (type != 2 || lat > 1000)
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continue;
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if (uacpi_object_get_buffer(e.objects[0], &d) != UACPI_STATUS_OK ||
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d.length < 15 || d.const_bytes[0] != 0x82)
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continue;
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uint8 space = d.const_bytes[3];
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uint64 addr = 0;
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for (int k = 0; k < 8; k++)
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addr |= (uint64)d.const_bytes[7 + k] << (8 * k);
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if (space == UACPI_ADDRESS_SPACE_SYSTEM_IO && addr && addr < 0x10000) {
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acpi_idle.kind = ACPI_IDLE_IO;
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} else if (space == UACPI_ADDRESS_SPACE_FFIXEDHW && (d.const_bytes[4] == 1)) {
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// Intel's FFH encoding: vendor 1, class 2 (native C-state), and
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// the MWAIT hint in the low byte of the address.
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acpi_idle.kind = ACPI_IDLE_MWAIT;
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} else {
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continue;
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}
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acpi_idle.addr = addr;
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acpi_idle.latency = lat;
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break;
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}
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}
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uacpi_object_unref(o);
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}
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static uacpi_iteration_decision
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found_cpu(void *user, uacpi_namespace_node *node, uacpi_u32 depth)
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{
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(void)user; (void)depth;
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if (cst_done)
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return UACPI_ITERATION_DECISION_BREAK;
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cst_parse(node);
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cst_done = 1; // every processor's _CST is the same in practice
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return UACPI_ITERATION_DECISION_BREAK;
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}
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static void
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cstate_find(void)
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{
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uint32 a, b, c, dd;
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// The local APIC timer is what wakes an idle CPU for the scheduler tick.
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// Below C1 it may stop, unless the CPU says it keeps running (ARAT,
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// CPUID 6 EAX bit 2); without that an idle CPU would sleep for good.
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cpuid_leaf(6, &a, &b, &c, &dd);
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if (!(a & 4)) {
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kinfo("acpi: no always-running APIC timer; idle stays at C1\n");
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return;
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}
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uacpi_namespace_for_each_child(uacpi_namespace_root(), found_cpu, 0,
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UACPI_OBJECT_PROCESSOR_BIT,
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UACPI_MAX_DEPTH_ANY, 0);
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if (!cst_done)
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uacpi_find_devices("ACPI0007", found_cpu, 0);
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if (acpi_idle.kind == ACPI_IDLE_MWAIT) {
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cpuid_leaf(1, &a, &b, &c, &dd);
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if (!(c & (1u << 3))) // no MONITOR/MWAIT after all
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acpi_idle.kind = ACPI_IDLE_HLT;
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}
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if (acpi_idle.kind == ACPI_IDLE_IO)
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kinfo("acpi: idle CPUs enter C2 through port %x (wake-up %d us)\n",
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(uint)acpi_idle.addr, acpi_idle.latency);
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else if (acpi_idle.kind == ACPI_IDLE_MWAIT)
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kinfo("acpi: idle CPUs enter C2 by MWAIT hint %x (wake-up %d us)\n",
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(uint)acpi_idle.addr, acpi_idle.latency);
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else
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kinfo("acpi: no usable C2 in _CST; idle stays at C1\n");
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}
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