Linux's own r8169 through LDLS, deep idle, and the GPU plan

The RTL8168 is now driven by Linux's r8169, unmodified, in a process.
`make ldls-r8169` stages it from the running kernel together with libphy,
mdio-bus, mdio_devres and the Realtek PHY driver, the kernel's BTF and
the RTL PHY firmware, and etc/schinit/ldls-r8169.job starts it at boot
with its log in /var/log/ldls-r8169.log. The native driver is out of the
registry; its code, now with Linux's 8168H setup, stays as the fallback.

LDLS grows what that needed:
- ldlsd loads a comma-separated module set in dependency order, each
  linking against the ones before it, with BTF read before any
  init_module runs;
- a driver core (bus match, driver probe), devres, kernel printf, real
  udelay/msleep/ktime and 1000 Hz jiffies, phylib's bitmaps and
  link_mode_params, firmware from /lib/firmware, and the symbols whose
  stub zero was a lie (list validity, try_module_get, dev_err_probe,
  eth_platform_get_mac_address);
- pdev->bus is a real pci_bus, and cmovcc from per-CPU memory is
  rewritten like the other %gs forms.
In QEMU all five modules load, link and initialise, and r8169 registers
and finds no device. Probe and traffic are untested until real hardware.

The kernel turns ASPM off on Realtek NIC links at boot, as r8169 does
through pci_disable_link_state, which a process cannot.

Idle CPUs enter ACPI _CST's C2 (CC6 on Zen) by port read or MWAIT when
the APIC timer keeps running, instead of only ever halting at C1.

docs/plan/gpu.md: amdgpu and nouveau through LDLS, with measurements.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01S1giNvrHTrPMPw7V6x1kQ4

kernel/proc/proc.c

@@ -16,6 +16,7 @@
 #include "uapi/errno.h"
 #include "fs/blkdev.h"
 #include "core/uaccess.h"
+#include "dev/acpi.h"
 
 // Verify myproc()->fs_base offset matches the hardcoded 0x688 in trapasm.S.
 _Static_assert(__builtin_offsetof(struct proc, fs_base) == 0x18,
@@ -1983,6 +1984,33 @@ sched_slice_expired(void)
   return (p->slice_used + ns) >= p->slice_ns;
 }
 
+// Wait for an interrupt as deeply as the firmware allows. See acpi_idle in
+// kernel/acpi/aml.c. Interrupts are off on the way down so that one arriving
+// between the decision and the sleep is not lost: a pending interrupt still
+// ends the sleep (MWAIT's ECX bit 0 says so explicitly; an I/O-entered C2
+// wakes on it by design), and is taken at the sti after.
+static void
+cpu_idle(void)
+{
+  static volatile int monitor_line[16];
+
+  switch (acpi_idle.kind) {
+  case ACPI_IDLE_IO:
+    cli();
+    (void)inb((ushort)acpi_idle.addr);
+    sti();
+    break;
+  case ACPI_IDLE_MWAIT:
+    cli();
+    asm volatile("monitor" : : "a"(monitor_line), "c"(0), "d"(0));
+    asm volatile("mwait" : : "a"((uint32)acpi_idle.addr), "c"(1));
+    sti();
+    break;
+  default:
+    hlt();
+  }
+}
+
 void
 scheduler(void)
 {
@@ -1999,7 +2027,7 @@ scheduler(void)
       // hlt() would stop every other CPU from scheduling until an interrupt
       // happened to arrive here.
       release(&ptable.lock);
-      hlt();
+      cpu_idle();
       continue;
     }