hybrid: interrupts to userspace, and a crashed driver that stays crashed
docs/plan/hybrid.md mechanism 3. A process asks for a device's interrupts with
PCIIOC_IRQ and then reads them, which is how Linux's uio does it and for the
same reason: a descriptor composes with poll, and a driver that stops reading
falls behind rather than losing events. read() returns a count rather than a
flag, so a driver that was busy sees it missed three and acts once.
Proven against an e1000e by asserting a cause through its ICS register and
reading the interrupt back out in userspace:
interrupts routed here (line 10)
interrupt delivered, count = 1
ICR = 0x80000004
0x80000004 is the cause the test set plus INT_ASSERTED -- the device's own
register, read by userspace as its acknowledgement.
**The masking is the design, not a detail.** A PCI line is level-triggered and
stays asserted until the cause is cleared at the device, which is a different
register on every chip and so is something only the driver can do. The kernel
masks the line on arrival and userspace's write() unmasks it. Signalling EOI on
a still-asserted line re-enters the handler immediately and for ever; this
kernel did exactly that by accident at 72,000 interrupts a second, and what it
looked like from outside was a clock running seven times slow (§13).
Which decides what happens when a driver dies mid-interrupt: the line is left
**masked**. The instinct is to unmask -- do not leave the device dead -- and it
is wrong, because unmasking an asserted line with no handler is a crashed
driver taking the machine down with it. Masked is safe and not permanent: the
next PCIIOC_IRQ arms it. Both halves verified by crashing a driver on purpose
and then starting another one.
A line already carrying kernel handlers is refused outright. Masking is
per-line, so handing out a shared one would silence whichever kernel driver is
also there, with nothing logged. MSI is the real answer and pci_msi_enable() is
already in the tree waiting for a caller.
Also fixed, found by running the crash twice: DMA buffers were never returned
when a process exited. The arena is 4 MB and contiguous, so a driver that
restarts a few times exhausted it -- "out of DMA memory, 3584 free" -- which is
a poor property for an interface whose whole promise is that a driver can crash
and come back.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01VQ7Qx8E1q1M1bbCq8QLHS2
This commit is contained in:
Nexoniarz
parent
24f79194ab
commit
72074a960e
6 changed files with 331 additions and 12 deletions
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@ -27,6 +27,7 @@
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#include "pci.h"
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#include "errno.h"
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#include "uaccess.h"
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#include "irq.h"
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#include "pciuser.h"
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int mappages(pml4e_t *pgdir, void *va, uint64 size, uint64 pa, int perm);
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@ -37,6 +38,57 @@ static struct proc *owner[NPCI];
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static struct spinlock pciuser_lock;
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// Interrupt delivery, one device per process.
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//
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// The count is what read() returns and what the reader compares against: a
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// driver that was slow sees the count jump rather than missing an edge, which
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// is the property that makes a count better than a flag.
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struct irqdev {
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struct proc *proc; // who reads, 0 when unused
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int index; // pci_get() index
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int irq; // the line
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uint64 count; // interrupts taken
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uint64 seen; // what the reader has consumed
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int masked;
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};
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static struct irqdev irqdev;
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// DMA buffers handed out, so they can be taken back.
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//
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// The arena is small and contiguous -- it has to be, a device cannot follow a
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// free list -- so a driver that exits without returning its buffers exhausts
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// it in a handful of restarts. Which is precisely the workload this interface
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// invites: the whole promise is that a driver can crash and be restarted, and
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// a promise that leaks a few kilobytes every time it is kept is not one.
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#define PCIUSER_MAXDMA 16
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struct dmablk {
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struct proc *proc;
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void *kva;
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uint64 size;
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};
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static struct dmablk dmablk[PCIUSER_MAXDMA];
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// The handler. Runs in interrupt context, so it does the two things that
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// cannot wait and nothing else.
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//
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// Masking is the important one. The line is level-triggered and still asserted
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// -- only the device's own driver can clear that, and its driver is a process
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// that is not running yet. Signalling EOI on an asserted line re-enters here
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// immediately and for ever; see docs/history/kernel.md section 13 for what
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// that looks like from outside. So the line goes quiet until userspace says
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// it has dealt with the device.
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static void
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pciuser_irq_handler(void *arg)
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{
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(void)arg;
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irqdev.count++;
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if (!irqdev.masked) {
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ioapicmask(irqdev.irq);
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irqdev.masked = 1;
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}
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wakeup(&irqdev);
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}
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void
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pciuser_init(void)
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{
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@ -89,6 +141,37 @@ pciuser_release_all(struct proc *p)
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for (int i = 0; i < NPCI; i++)
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if (owner[i] == p)
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owner[i] = 0;
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// And its interrupt line -- unregistered, and left MASKED.
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//
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// The instinct is to unmask on the way out, so the device is not left dead.
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// That is exactly wrong, and for the reason running through this whole file:
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// the driver died, so nobody cleared the cause at the device, so the line is
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// very likely still asserted. Unmasking it with no handler attached means
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// every EOI re-enters an empty dispatch, for ever -- a crashed driver taking
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// the machine down with it, which is the precise opposite of what running
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// drivers in processes is for.
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//
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// Masked is safe and it is not permanent: PCIIOC_IRQ arms the line when the
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// next driver claims the device.
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// Its DMA buffers. The process's page tables are torn down by exit() either
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// way; what needs saying here is that the *arena* gets its pages back.
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for (int i = 0; i < PCIUSER_MAXDMA; i++) {
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if (dmablk[i].proc != p)
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continue;
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if (dmablk[i].kva)
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dma_free(dmablk[i].kva, dmablk[i].size);
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dmablk[i].proc = 0;
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dmablk[i].kva = 0;
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dmablk[i].size = 0;
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}
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if (irqdev.proc == p) {
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irq_unregister(irqdev.irq, pciuser_irq_handler, 0);
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ioapicmask(irqdev.irq);
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irqdev.masked = 1;
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irqdev.proc = 0;
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}
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release(&pciuser_lock);
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}
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@ -221,10 +304,23 @@ do_dma(uint64 argp)
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if (size == 0 || size > 4 * 1024 * 1024)
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return -EINVAL;
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void *kva = dma_alloc(size, PGSIZE);
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if (!kva)
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// A slot to remember it by, found before allocating: handing out memory that
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// cannot be recorded is how the leak this fixes got written in the first
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// place.
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struct dmablk *blk = 0;
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acquire(&pciuser_lock);
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for (int i = 0; i < PCIUSER_MAXDMA; i++)
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if (!dmablk[i].proc) { blk = &dmablk[i]; blk->proc = myproc(); break; }
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release(&pciuser_lock);
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if (!blk)
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return -ENOMEM;
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void *kva = dma_alloc(size, PGSIZE);
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if (!kva) {
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blk->proc = 0;
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return -ENOMEM;
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}
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// Its own mapping in the caller, taken from the same bump allocator mmap
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// uses so the two cannot collide.
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struct proc *p = myproc();
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@ -236,14 +332,65 @@ do_dma(uint64 argp)
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uint64 phys = dma_phys(kva);
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if (mappages(p->pgdir, (void *)va, size, phys, PTE_W | PTE_U) < 0) {
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dma_free(kva, size);
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blk->proc = 0;
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return -ENOMEM;
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}
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blk->kva = kva;
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blk->size = size;
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req->uaddr = va;
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req->paddr = phys;
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return 0;
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}
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// Hand a device's interrupts to the calling process.
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static int
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do_irq(uint64 argp)
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{
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int idx;
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if (copy_from_user(&idx, argp, sizeof(idx)) < 0)
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return -EFAULT;
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if (idx < 0 || idx >= pci_count() || idx >= NPCI)
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return -ENODEV;
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if (owner[idx] != myproc())
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return -EACCES; // claim it first
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const struct pci_dev *d = pci_get(idx);
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if (!d || d->irq == 0xFF)
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return -ENODEV; // the firmware routed it nowhere
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// Refuse a line the kernel is already listening on.
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//
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// This handler masks the line, and a masked line is masked for *everyone* on
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// it. Doing that to a shared line silences whichever kernel driver is also
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// there, and the symptom -- a device that simply stops, with nothing logged
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// -- is about as hard to find as bugs get. MSI is the real answer, since it
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// is per-device and cannot be shared; pci_msi_enable() is already in the
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// tree waiting for a caller.
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if (irq_handler_count(d->irq) > 0)
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return -EBUSY;
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if (irqdev.proc && irqdev.proc != myproc())
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return -EBUSY; // one device per process, and one process
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irqdev.proc = myproc();
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irqdev.index = idx;
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irqdev.irq = d->irq;
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irqdev.count = 0;
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irqdev.seen = 0;
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irqdev.masked = 0;
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// Level-triggered and active low, like every PCI INTx line.
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irq_register(d->irq, pciuser_irq_handler, 0, "userspace", 1);
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// Arm it. The line may have been left masked by whatever held this device
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// before -- see pciuser_release_all -- and a driver that has to write()
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// before its first read() to get going is an interface nobody will guess.
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ioapicroute(d->irq, 0, 1);
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irqdev.masked = 0;
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return 0;
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}
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int
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pciuser_ioctl(uint64 request, uint64 argp)
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{
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@ -257,23 +404,65 @@ pciuser_ioctl(uint64 request, uint64 argp)
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case PCIIOC_CLAIM: return do_claim(argp);
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case PCIIOC_RELEASE: return do_release(argp);
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case PCIIOC_DMA: return do_dma(argp);
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case PCIIOC_IRQ: return do_irq(argp);
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default: return -ENOTTY;
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}
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}
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// Reads and writes are not how this device is used -- registers come through
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// mmap and everything else through ioctl -- but a device in devsw needs both,
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// and returning 0 is a better answer than a null pointer dereference.
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// Wait for the device to interrupt.
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//
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// Returns the total count rather than a flag, so a driver that was busy can
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// see it missed three and act once -- which is what you want, because the
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// alternative is either losing them or queueing them, and a device does not
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// care how many times you noticed it.
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int
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pciuser_read(struct inode *ip, uint64 off, char *dst, int n)
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{
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(void)ip; (void)off; (void)dst; (void)n;
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return 0;
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(void)off;
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if (irqdev.proc != myproc())
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return -1;
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if (n < (int)sizeof(uint64))
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return -1;
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iunlock(ip);
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acquire(&pciuser_lock);
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while (irqdev.count == irqdev.seen) {
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if (myproc()->killed) {
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release(&pciuser_lock);
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ilock(ip);
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return -1;
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}
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sleep(&irqdev, &pciuser_lock);
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}
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uint64 c = irqdev.count;
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irqdev.seen = c;
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release(&pciuser_lock);
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ilock(ip);
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memmove(dst, &c, sizeof(c));
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return (int)sizeof(c);
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}
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// "I have dealt with the device" -- unmask the line.
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//
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// The driver must have cleared the interrupt *at the device* before this, or
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// the line is still asserted and unmasking simply re-enters the handler. That
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// is the contract, it cannot be checked from here, and getting it wrong is the
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// 72,000-interrupts-a-second failure in docs/history/kernel.md section 13.
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int
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pciuser_write(struct inode *ip, uint64 off, char *src, int n)
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{
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(void)ip; (void)off; (void)src;
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if (irqdev.proc != myproc())
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return -1;
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acquire(&pciuser_lock);
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if (irqdev.masked) {
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ioapicroute(irqdev.irq, 0, 1); // level, active low: a PCI INTx line
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irqdev.masked = 0;
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}
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release(&pciuser_lock);
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return n;
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}
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