acpi: uACPI, for interrupt routing, the power button and power-off
The firmware's AML is now interpreted. uACPI 6.1.1 (MIT) is fetched by ports/uacpi, checksum-verified, and compiled into the kernel unmodified, the same way lwIP is. kernel/acpi/host.c is its host layer: memory, mapping, port and PCI config I/O, time, mutexes and events that spin before the scheduler exists, the SCI, and an "acpi" thread for the work the SCI defers. PCI interrupts go where the board says. pci_init() now routes every device's INTx through the root bridge's _PRT before drivers bind. It follows link devices' _CRS, uses a bridge's own _PRT where the namespace has one, and swizzles through bridges that don't. Before this, INTx waited on the 8259's line number, which is the wrong pin in APIC mode. irq_register() takes a trigger mode rather than a level/low flag, because q35's links and most SCIs are level, active-high. The MADT's interrupt source overrides are now parsed, and are what places the SCI. The power button syncs the filesystems and powers off. shutdown() and reboot() go through the firmware's S5 and reset register first, and only then fall back to the emulators' ports, which a real board does not answer. Tested under QEMU: q35 with MSI off routes xHCI to GSI 22, level/active-high, and it takes real interrupts with nothing polled. system_powerdown powers off q35 and i440fx (QEMU exits 0), and q35 with 4 CPUs boots from NVMe with USB hot-plug working alongside. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01S1giNvrHTrPMPw7V6x1kQ4
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include/acpi.h
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include/acpi.h
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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// ACPI, in two layers.
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//
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// kernel/arch/x86_64/acpi.c reads the static tables at boot, before anything
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// else can run: the MADT for the processors and the I/O APIC and its
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// interrupt source overrides, the FADT for the PM timer.
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//
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// kernel/acpi/ is everything that needs AML, which is the firmware's own code
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// and has to be interpreted: uACPI (ports/uacpi) runs it, and aml.c uses it
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// for PCI interrupt routing, the power button, power-off and reset. Every
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// function below that depends on it does nothing, and says so by returning
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// -1, on a machine whose AML could not be loaded.
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// The RSDP's physical address, or 0 if there is none.
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uint64 acpi_rsdp_phys(void);
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// The GSI an ISA IRQ is wired to, after the MADT's interrupt source
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// overrides, and its trigger mode (an IRQ_* from irq.h) in *mode. `dflt` is
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// the mode when the override says "conforms to the bus" or there is none:
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// edge/high for an ISA device, level/low for the SCI.
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int acpi_isa_gsi(int isa, int dflt, int *mode);
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// Load and initialize the namespace. After kinit, before pci_init.
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void acpi_aml_init(void);
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// The worker thread that runs AML on behalf of interrupts. After sinit.
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void acpi_thread_start(void);
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// Route every PCI device's INTx through _PRT. From pci_init, before binding.
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void acpi_pci_route(void);
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int acpi_poweroff(void); // S5; returns only on failure
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int acpi_reboot(void); // the FADT reset register; ditto
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@ -41,6 +41,16 @@ typedef void (*irq_handler_t)(void *arg);
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// than ISA's (edge-triggered, active high). Getting this wrong does not fail
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// cleanly: an edge-configured level interrupt fires once and then wedges,
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// because the device keeps the line asserted and no further edge ever comes.
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//
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// It is a mode, not a flag. 0 and 1 are the two above, which is all a PCI or
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// ISA device needs; the other two are what ACPI can say about a line -- q35's
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// PCI links and most machines' SCI are level-triggered *active high*, and
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// programming one active low leaves the pin reading as permanently asserted.
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#define IRQ_EDGE_HIGH 0 // ISA
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#define IRQ_LEVEL_LOW 1 // PCI INTx
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#define IRQ_LEVEL_HIGH 2
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#define IRQ_EDGE_LOW 3
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#define IRQ_IS_LEVEL(m) ((m) == IRQ_LEVEL_LOW || (m) == IRQ_LEVEL_HIGH)
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int irq_register(int irq, irq_handler_t fn, void *arg, const char *name,
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int level_low);
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void irq_unregister(int irq, irq_handler_t fn, void *arg);
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@ -68,6 +68,9 @@ struct pci_dev {
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uint16 vendor, device;
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uint8 class, subclass, prog_if, revision;
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uint8 irq; // interrupt line, 0xFF when unrouted
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// How that line is signalled, an IRQ_* mode from irq.h. PCI's level/low
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// unless ACPI's routing says otherwise -- see kernel/acpi/aml.c.
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uint8 irq_mode;
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uint8 header_type;
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struct pci_bar bar[6];
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const char *driver; // name of whatever claimed it, or 0
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