include: one folder per subsystem, and includes that name it
Sixty-five headers sat side by side in include/, so `#include "irq.h"` said nothing about where irq.h was or what it belonged to, and errno.h, stat.h and fcntl.h at the top shadowed the system's for any host tool built with -I./include. They are in folders now -- arch/ core/ fs/ dev/ gfx/ net/ uapi/ (and ldls/ for the Linux driver layer) -- and every include names the folder, as Linux's do: "core/proc.h". Done mechanically and checked the hard way: the kernel built from this tree disassembles identically to the one built from the tree before it. The full image boots, and userland is the same set of programs. Paths in docs and comments follow; docs/guides/layout.md has a table of what is where, and tools/fix-includes.py rewrites old-style includes from the folders in the tree, for code written before this. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01S1giNvrHTrPMPw7V6x1kQ4
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267 changed files with 1560 additions and 1440 deletions
130
include/arch/mmu.h
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include/arch/mmu.h
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#pragma once
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// Eflags register
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#define FL_CF 0x00000001 // Carry Flag
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#define FL_PF 0x00000004 // Parity Flag
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#define FL_AF 0x00000010 // Auxiliary carry Flag
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#define FL_ZF 0x00000040 // Zero Flag
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#define FL_SF 0x00000080 // Sign Flag
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#define FL_TF 0x00000100 // Trap Flag
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#define FL_IF 0x00000200 // Interrupt Enable
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#define FL_DF 0x00000400 // Direction Flag
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#define FL_OF 0x00000800 // Overflow Flag
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#define FL_IOPL_MASK 0x00003000 // I/O Privilege Level bitmask
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#define FL_NT 0x00004000 // Nested Task
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#define FL_RF 0x00010000 // Resume Flag
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#define FL_VM 0x00020000 // Virtual 8086 mode
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#define FL_AC 0x00040000 // Alignment Check
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#define FL_VIF 0x00080000 // Virtual Interrupt Flag
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#define FL_VIP 0x00100000 // Virtual Interrupt Pending
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#define FL_ID 0x00200000 // ID flag
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// Control Register flags
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#define CR0_PE 0x00000001 // Protection Enable
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#define CR0_MP 0x00000002 // Monitor coProcessor
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#define CR0_EM 0x00000004 // Emulation
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#define CR0_TS 0x00000008 // Task Switched
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#define CR0_ET 0x00000010 // Extension Type
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#define CR0_NE 0x00000020 // Numeric Errror
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#define CR0_WP 0x00010000 // Write Protect
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#define CR0_AM 0x00040000 // Alignment Mask
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#define CR0_NW 0x20000000 // Not Writethrough
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#define CR0_CD 0x40000000 // Cache Disable
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#define CR0_PG 0x80000000 // Paging
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#define CR4_PSE 0x00000010 // Page size extension
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#define CR4_PAE 0x00000020 // Physical address extensions
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#define CR4_OSXFSR 0x00000200 // OS supports FXSAVE and FXRSTOR
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#define CR4_OSXMMEXCPT 0x00000400 // OS supports SSE exceptions
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// Model specific registers
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#define MSR_EFER 0xC0000080 // Extended Feature Enable Register
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#define MSR_STAR 0xC0000081 // Legacy Mode SYSCALL Target
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#define MSR_LSTAR 0xC0000082 // Long Mode SYSCALL Target
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#define MSR_CSTAR 0xC0000083 // Compatibility Mode SYSCALL Target
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#define MSR_SFMASK 0xC0000084 // SYSCALL Flag Mask
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// Segment selectors
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#define SEG_KCODE 1
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#define SEG_KDATA 2
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#define SEG_UCODE32 3
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#define SEG_UDATA 4
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#define SEG_UCODE 5
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#define SEG_KCPU 6
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#define SEG_TSS 7 // TSS takes 2 slots in 64-bit GDT
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#define NSEGS 9
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#define DPL_USER 0x3
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#define USER_CS ((SEG_UCODE<<3)|DPL_USER)
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#define USER_DS ((SEG_UDATA<<3)|DPL_USER)
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#define KERNEL_CS (SEG_KCODE<<3)
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#ifndef __ASSEMBLER__
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// Segment Descriptor
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struct segdesc {
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uint32 lim_15_0 : 16; // Low bits of segment limit
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uint32 base_15_0 : 16; // Low bits of segment base address
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uint32 base_23_16 : 8; // Middle bits of segment base address
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uint32 type : 4; // Segment type
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uint32 s : 1; // 0 = system, 1 = application
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uint32 dpl : 2; // Descriptor Privilege Level
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uint32 p : 1; // Present
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uint32 lim_19_16 : 4; // High bits of segment limit
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uint32 avl : 1; // Available for software use
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uint32 l : 1; // 1 = 64-bit segment (Long mode)
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uint32 db : 1; // 0 = 16-bit, 1 = 32-bit
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uint32 g : 1; // Granularity
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uint32 base_31_24 : 8; // High bits of segment base address
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};
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// 64-bit System Segment Descriptor (e.g., TSS)
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struct desclong {
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struct segdesc sd;
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uint32 base_63_32; // High bits of 64-bit base address
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uint32 res; // Reserved
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};
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#define SEG(type, base, lim, dpl) (struct segdesc) \
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{ ((lim) >> 12) & 0xffff, (uint32)(base) & 0xffff, \
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((uint32)(base) >> 16) & 0xff, type, 1, dpl, 1, \
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(uint32)(lim) >> 28, 0, 1, 0, 1, (uint32)(base) >> 24 }
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#endif
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// Application segment type bits
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#define STA_X 0x8 // Executable segment
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#define STA_W 0x2 // Writeable (non-executable)
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#define STA_R 0x2 // Readable (executable)
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// System segment type bits
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#define STS_T64A 0x9 // Available 64-bit TSS
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#define STS_T64B 0xB // Busy 64-bit TSS
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#define STS_IG64 0xE // 64-bit Interrupt Gate
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#define STS_TG64 0xF // 64-bit Trap Gate
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// Page table structure: 4 levels
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#define PMX(va) (((addr_t)(va) >> 39) & 0x1FF)
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#define PDPX(va) (((addr_t)(va) >> 30) & 0x1FF)
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#define PDX(va) (((addr_t)(va) >> 21) & 0x1FF)
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#define PTX(va) (((addr_t)(va) >> 12) & 0x1FF)
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#define PGSIZE 4096
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#define PXMASK 0x1FF
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#define PGROUNDUP(sz) (((sz)+((addr_t)PGSIZE-1)) & ~((addr_t)(PGSIZE-1)))
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#define PGROUNDDOWN(a) (((a)) & ~((addr_t)(PGSIZE-1)))
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// Page table/directory entry flags
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#define PTE_P 0x001 // Present
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#define PTE_W 0x002 // Writeable
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#define PTE_U 0x004 // User
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#define PTE_PWT 0x008 // Write-Through
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#define PTE_PCD 0x010 // Cache-Disable
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#define PTE_A 0x020 // Accessed
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#define PTE_D 0x040 // Dirty
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#define PTE_PS 0x080 // Page Size (Huge Page)
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#define PTE_ADDR(pte) ((addr_t)(pte) & 0x000FFFFFFFFFF000ull)
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#define PTE_FLAGS(pte) ((addr_t)(pte) & 0xFFF)
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