Map device registers with ioremap instead of assuming a low BAR
Every driver reached its registers with P2V(bar.base), which assumes the BAR sits inside the 0-4 GB the direct map covers. Under SeaBIOS it always does. Under OVMF it does not: firmware may place a 64-bit BAR anywhere, and it puts virtio-gpu's at about 768 GB. P2V produced an address with no translation behind it, so the driver's first register write took a page fault, then a double fault, then a triple fault and a reboot loop -- which, coming from a driver bind, reads as broken hardware rather than a missing mapping. ioremap() carries each region on a 1 GB page in PDPT entries 4-511, which were unused: the direct map occupies 0-3, and kpml4[0], kpml4[KERNBASE] and every process's PML4 all share that one table, so a mapping appears in every address space at once with no page table to allocate. The pages are cache-disabled and write-through for the same reason the top GB of the direct map is -- these are registers, and a write sitting in a cache line is a write the device never sees. A physical address below 4 GB returns the direct-map address unchanged, so the BIOS path, where every BAR is low, is byte for byte what it was. virtio-gpu now initialises under OVMF (1280x800, queue 64) instead of triple faulting. e1000 and xhci had the identical latent bug; xhci was already refusing to bind above 4 GB with a comment saying the mapping did not exist yet, and now it does. BIOS unchanged: bootcheck 108 [ok] with -Fb -Tty -Usb -Sock -Evdev -Ps, e1000 and xhci both binding. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
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5 changed files with 106 additions and 12 deletions
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@ -437,6 +437,11 @@ void console_takeover(void);
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// vm.c
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void seginit(void);
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void kvmalloc(void);
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// Map device registers. Returns a kernel address for `size` bytes of physical
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// MMIO at `pa`, or 0 if the window is exhausted. Use this rather than P2V for
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// anything that came out of a BAR: firmware may place a 64-bit BAR far above
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// the 4 GB the direct map covers.
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void* ioremap(uint64 pa, uint64 size);
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pml4e_t* setupkvm(void);
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char* uva2ka(pml4e_t*, char*);
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addr_t allocuvm(pml4e_t*, uint64, uint64);
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