Sixty-five headers sat side by side in include/, so `#include "irq.h"` said nothing about where irq.h was or what it belonged to, and errno.h, stat.h and fcntl.h at the top shadowed the system's for any host tool built with -I./include. They are in folders now -- arch/ core/ fs/ dev/ gfx/ net/ uapi/ (and ldls/ for the Linux driver layer) -- and every include names the folder, as Linux's do: "core/proc.h". Done mechanically and checked the hard way: the kernel built from this tree disassembles identically to the one built from the tree before it. The full image boots, and userland is the same set of programs. Paths in docs and comments follow; docs/guides/layout.md has a table of what is where, and tools/fix-includes.py rewrites old-style includes from the folders in the tree, for code written before this. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01S1giNvrHTrPMPw7V6x1kQ4
100 lines
2 KiB
C
100 lines
2 KiB
C
// Intel 8250 serial port (UART).
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#include "core/types.h"
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#include "core/defs.h"
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#include "core/irq.h"
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#include "core/param.h"
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#include "arch/traps.h"
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#include "core/spinlock.h"
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#include "core/sleeplock.h"
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#include "fs/fs.h"
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#include "fs/file.h"
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#include "arch/mmu.h"
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#include "core/proc.h"
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#include "arch/x86.h"
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#define COM1 0x3f8
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static int uart; // is there a uart?
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void
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uartearlyinit(void)
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{
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char *p;
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// Turn off the FIFO
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outb(COM1+2, 0);
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// 9600 baud, 8 data bits, 1 stop bit, parity off.
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outb(COM1+3, 0x80); // Unlock divisor
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outb(COM1+0, 115200/9600);
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outb(COM1+1, 0);
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outb(COM1+3, 0x03); // Lock divisor, 8 data bits.
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outb(COM1+4, 0);
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outb(COM1+1, 0x01); // Enable receive interrupts.
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// If status is 0xFF, no serial port.
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if(inb(COM1+5) == 0xFF)
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return;
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uart = 1;
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// Announce that we're here -- only when asked for. This is the first thing a serial line ever sees from
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// SchOS and it says nothing except that the port works -- which is worth a
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// line on a boot you are watching and not on every boot for ever. It cannot
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// go through kinfo(): it runs before there is a console to route it to.
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if (!boot_verbose)
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return;
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for(p="SchOS UART...\n"; *p; p++)
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uartputc(*p);
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}
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// irq.c hands every handler an opaque argument, because a driver with two
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// controllers needs to know which one interrupted. There is only one COM1.
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static void
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uart_irq(void *arg)
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{
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(void)arg;
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uartintr();
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}
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void
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uartinit(void)
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{
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if(!uart)
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return;
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// Acknowledge pre-existing interrupt conditions;
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// enable interrupts.
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inb(COM1+2);
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inb(COM1+0);
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irq_register(IRQ_COM1, uart_irq, 0, "serial", 0);
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}
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void
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uartputc(int c)
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{
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int i;
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if(!uart)
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return;
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for(i = 0; i < 128 && !(inb(COM1+5) & 0x20); i++)
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microdelay(10);
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outb(COM1+0, c);
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}
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static int
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uartgetc(void)
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{
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if(!uart)
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return -1;
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if(!(inb(COM1+5) & 0x01))
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return -1;
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return inb(COM1+0);
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}
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void
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uartintr(void)
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{
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consoleintr(uartgetc);
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}
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