README: rewritten around what runs (Linux software, Xorg, apk, Linux's drivers), the honest gaps, measured numbers. plan/: 1.0.md is the finish line, where each clause of the acceptance test stands, and the register (one failing clause: a root that survives a reboot); built plans (foundations, hybrid, alpine, xorg) and the decided-against one (wayland) are gone, their content lives in architecture/; roadmap.md is only what is still open. guides: building/layout/testing/adding-a-driver (Linux code may be used). history: four entries (ls -lR, TLB shootdowns, MDIO 0x02460246, netlink MSG_TRUNC). Website: cards, stack, download page, docs index. Code comments that pointed at deleted plan docs point at the architecture docs. Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01EVRhxi9zpdW2uDUN4FVcao
508 lines
18 KiB
C
508 lines
18 KiB
C
// Intel 8254x gigabit Ethernet, written from Intel's public datasheet (317453).
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//
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// What it provides the rest of the system is a struct netdev_ops and nothing
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// else: a station address, a transmit path and a receive ring. It does not
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// know that lwIP exists, and lwIP does not know that it does -- see
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// include/dev/netdev.h for why that boundary is where it is. Adding a second NIC
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// means writing another driver that fills in the same four function pointers,
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// and touching no file outside its own directory.
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//
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// Bring-up follows the manual's initialisation sequence (section 14.3-14.5):
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// reset, read the MAC out of EEPROM, clear the multicast table, set up the
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// receive and transmit rings, then enable each. The order matters -- enabling a
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// receiver whose ring base is still zero makes the device DMA into physical
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// address 0, which on this kernel is the boot page table.
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#include "core/types.h"
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#include "core/defs.h"
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#include "core/param.h"
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#include "arch/x86.h"
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#include "core/spinlock.h"
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#include "core/sleeplock.h"
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#include "fs/fs.h"
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#include "fs/file.h"
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#include "arch/mmu.h"
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#include "arch/memlayout.h"
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#include "dev/pci.h"
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#include "dev/device.h"
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#include "dev/netdev.h"
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#include "core/dma.h"
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#include "core/irq.h"
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#include "e1000.h"
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struct e1000 {
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volatile uint8 *regs;
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struct e1000_tx_desc *tx;
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struct e1000_rx_desc *rx;
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uint8 *txbuf[E1000_NTX];
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uint8 *rxbuf[E1000_NRX];
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uint16 tx_next;
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uint16 rx_next;
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uint8 mac[6];
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int ready;
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// Which generation's EERD layout this part speaks. See E1000_EERD_DONE_8257X
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// in e1000.h -- it is the only register whose shape differs between the
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// 8254x and the PCIe 8257x, and getting it wrong yields a MAC of zeroes.
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int nvm_8257x;
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uint64 rx_packets, tx_packets, rx_dropped;
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// Which PCI device this instance drives. Kept so that attached() can match
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// the device the bus just published against the instance probe() set up --
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// the two calls are separate, and nothing else connects them.
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struct pci_dev *pdev;
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// And the network device the stack knows it by, so that letting go of the
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// hardware can also take the interface out of the stack. Set by attached(),
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// which is where the two are first introduced.
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struct device *ndev;
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struct spinlock lock;
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};
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// More than one, because a machine really can have two of the same card and
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// this driver used to refuse the second outright. Four is the same limit the
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// stack puts on interfaces; each unused entry costs a few dozen bytes, and the
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// rings behind a used one come from the DMA arena at probe time.
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#define E1000_MAX_NICS 4
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static struct e1000 nics[E1000_MAX_NICS];
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// The instance behind a device, or 0. Every op goes through this rather than a
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// file-static pointer, which is what makes two cards possible at all.
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static struct e1000 *
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nic_of(struct device *dev)
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{
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return dev ? (struct e1000 *)dev->priv : 0;
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}
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static inline uint32 rd(struct e1000 *e, int off) { return *(volatile uint32 *)(e->regs + off); }
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static inline void wr(struct e1000 *e, int off, uint32 v) { *(volatile uint32 *)(e->regs + off) = v; }
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// The EEPROM is read one 16-bit word at a time through a single register: write
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// the address with the start bit, poll for done, take the data out of the top
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// half.
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//
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// Bounded, because a device whose EEPROM never reports done would otherwise
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// hang the boot -- and QEMU's e1000 does answer, but a real card with a blank
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// EEPROM is a thing that exists.
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static int
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eeprom_read(struct e1000 *e, int addr, uint16 *out)
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{
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int shift = e->nvm_8257x ? E1000_EERD_ADDR_SHIFT_8257X
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: E1000_EERD_ADDR_SHIFT;
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uint32 done = e->nvm_8257x ? E1000_EERD_DONE_8257X : E1000_EERD_DONE;
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wr(e, E1000_EERD, (addr << shift) | E1000_EERD_START);
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for (int i = 0; i < 100000; i++) {
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uint32 v = rd(e, E1000_EERD);
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if (v & done) {
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*out = (uint16)(v >> E1000_EERD_DATA_SHIFT);
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return 0;
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}
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}
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return -1;
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}
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// The MAC address, from EEPROM words 0..2, little-endian within each word.
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//
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// Falls back to the receive-address registers, which the firmware may already
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// have programmed. QEMU fills both; some cards leave the EEPROM path
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// unimplemented, and a driver that only knows one of the two ends up with a MAC
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// of all zeroes and no idea why nothing answers it.
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static void
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read_mac(struct e1000 *e)
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{
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uint16 w;
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int ok = 1;
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for (int i = 0; i < 3; i++) {
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if (eeprom_read(e, i, &w) != 0) { ok = 0; break; }
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e->mac[i * 2] = (uint8)(w & 0xFF);
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e->mac[i * 2 + 1] = (uint8)(w >> 8);
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}
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if (ok)
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return;
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uint32 lo = rd(e, E1000_RAL), hi = rd(e, E1000_RAH);
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e->mac[0] = (uint8)lo; e->mac[1] = (uint8)(lo >> 8);
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e->mac[2] = (uint8)(lo >> 16); e->mac[3] = (uint8)(lo >> 24);
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e->mac[4] = (uint8)hi; e->mac[5] = (uint8)(hi >> 8);
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}
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static int
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rings_setup(struct e1000 *e)
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{
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// One block for both rings and every buffer, from the DMA arena: the device
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// reads all of it by physical address, and kalloc's pages are contiguous only
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// by accident.
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uint32 txring = E1000_NTX * sizeof(struct e1000_tx_desc);
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uint32 rxring = E1000_NRX * sizeof(struct e1000_rx_desc);
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e->tx = dma_alloc(txring, 16);
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e->rx = dma_alloc(rxring, 16);
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if (!e->tx || !e->rx)
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return -1;
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memset(e->tx, 0, txring);
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memset(e->rx, 0, rxring);
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for (int i = 0; i < E1000_NTX; i++) {
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e->txbuf[i] = dma_alloc(E1000_BUFSZ, 16);
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if (!e->txbuf[i])
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return -1;
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e->tx[i].addr = dma_phys(e->txbuf[i]);
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// DD set on every transmit descriptor at start-up, so the first pass round
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// the ring sees them as free. The hardware only sets it after it has used
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// one, and a driver that waits for a bit the device has never had reason to
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// write waits forever.
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e->tx[i].status = E1000_TXD_STAT_DD;
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}
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for (int i = 0; i < E1000_NRX; i++) {
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e->rxbuf[i] = dma_alloc(E1000_BUFSZ, 16);
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if (!e->rxbuf[i])
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return -1;
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e->rx[i].addr = dma_phys(e->rxbuf[i]);
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e->rx[i].status = 0;
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}
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wr(e, E1000_TDBAL, (uint32)dma_phys(e->tx));
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wr(e, E1000_TDBAH, (uint32)(dma_phys(e->tx) >> 32));
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wr(e, E1000_TDLEN, txring);
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wr(e, E1000_TDH, 0);
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wr(e, E1000_TDT, 0);
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wr(e, E1000_RDBAL, (uint32)dma_phys(e->rx));
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wr(e, E1000_RDBAH, (uint32)(dma_phys(e->rx) >> 32));
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wr(e, E1000_RDLEN, rxring);
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wr(e, E1000_RDH, 0);
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// Tail points at the last descriptor the hardware may fill. Setting it to
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// NRX-1 hands it every descriptor but one; the ring is full when head meets
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// tail, so one must always be held back or "full" and "empty" look identical.
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wr(e, E1000_RDT, E1000_NRX - 1);
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return 0;
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}
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// Queue one frame. Returns 0, or -1 if the ring is full.
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//
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// Copies into the descriptor's own buffer rather than mapping the caller's.
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// A zero-copy path wants the caller to guarantee the memory stays put and is
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// physically contiguous, which nothing above this can promise yet.
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//
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static int
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e1000_transmit(struct device *dev, const void *frame, int len)
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{
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struct e1000 *e = nic_of(dev);
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if (!e || !e->ready || len <= 0 || len > E1000_BUFSZ)
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return -1;
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acquire(&e->lock);
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struct e1000_tx_desc *d = &e->tx[e->tx_next];
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if (!(d->status & E1000_TXD_STAT_DD)) {
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release(&e->lock);
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return -1; // the device has not finished with it
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}
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memmove(e->txbuf[e->tx_next], frame, len);
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d->length = (uint16)len;
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d->cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS;
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d->status = 0;
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e->tx_next = (uint16)((e->tx_next + 1) % E1000_NTX);
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__sync_synchronize(); // descriptor visible before the tail moves
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wr(e, E1000_TDT, e->tx_next);
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e->tx_packets++;
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release(&e->lock);
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return 0;
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}
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// Take one received frame, if there is one. Returns its length, or 0.
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//
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// Polled. There is nothing above this to wake yet, and a receive path that
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// wakes a nonexistent protocol stack is harder to reason about than one that is
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// asked. The interrupt handler below exists to keep the cause register clear
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// and to count; when an IP stack arrives, this is where the hand-off changes.
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static int
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e1000_receive(struct device *dev, void *out, int cap)
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{
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struct e1000 *e = nic_of(dev);
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if (!e || !e->ready)
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return 0;
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acquire(&e->lock);
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struct e1000_rx_desc *d = &e->rx[e->rx_next];
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if (!(d->status & E1000_RXD_STAT_DD)) {
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release(&e->lock);
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return 0;
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}
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int len = d->length;
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if (len > cap)
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len = cap;
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memmove(out, e->rxbuf[e->rx_next], len);
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d->status = 0;
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__sync_synchronize();
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// Hand the descriptor back by moving the tail to it. The tail always trails
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// the descriptor just released, which is why it is the *previous* index.
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wr(e, E1000_RDT, e->rx_next);
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e->rx_next = (uint16)((e->rx_next + 1) % E1000_NRX);
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e->rx_packets++;
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release(&e->lock);
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return len;
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}
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static void
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e1000_intr(void *arg)
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{
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struct e1000 *e = arg;
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// Reading ICR clears it. Not reading it leaves the cause asserted, and with a
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// level-triggered PCI interrupt that means the handler is re-entered forever.
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uint32 cause = rd(e, E1000_ICR);
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// Nothing is read from the ring here. The frame is pulled by the network
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// thread through .receive, which may sleep on the buffer cache and on the
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// lwIP lock; an interrupt handler may do neither. All this does is end that
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// thread's wait, so the frame is taken now instead of up to 10 ms later.
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//
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// RXT0 is the receive timer expiring -- a frame, or a burst, has landed.
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// RXDMT0 is the ring falling below its minimum threshold, which means frames
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// are arriving faster than they are being taken and is exactly when waiting
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// for the clock hurts most.
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if (cause & (E1000_ICR_RXT0 | E1000_ICR_RXDMT0))
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netdev_rx_signal();
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}
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static int
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e1000_probe(struct pci_dev *d)
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{
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struct e1000 *e = 0;
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// A free slot, rather than "the one instance, if it is still free". The old
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// spelling is why a machine with two of these cards drove only the first.
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for (int i = 0; i < E1000_MAX_NICS; i++)
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if (!nics[i].ready) {
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e = &nics[i];
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break;
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}
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if (!e)
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return -1;
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if (!d->bar[0].base)
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return -1;
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e->pdev = d;
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// Everything from 0x105E upwards in the table is PCIe; the 8254x ids are all
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// below it. Spelled as a list rather than a comparison because an id is not
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// a magnitude -- 0x150C is a PCIe part and 0x1078 is not.
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switch (d->device) {
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case E1000_DEV_82571EB_COPPER: case E1000_DEV_82572EI_COPPER:
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case E1000_DEV_82572EI: case E1000_DEV_82573E:
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case E1000_DEV_82573L: case E1000_DEV_82574L:
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case E1000_DEV_82583V:
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e->nvm_8257x = 1;
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break;
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default:
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e->nvm_8257x = 0;
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break;
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}
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initlock(&e->lock, "e1000");
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pci_enable(d, 0x0006); // memory space + bus master
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// ioremap rather than P2V: firmware may place a 64-bit BAR above the 4 GB the
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// direct map covers. It returns the direct-map address unchanged for a low
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// BAR, which is every BAR under SeaBIOS.
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e->regs = (volatile uint8 *)ioremap(d->bar[0].base, d->bar[0].size);
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if (!e->regs)
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return -1;
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// Reset, then wait for it to clear. The manual asks for a delay after reset
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// before any other register is touched; polling CTRL is that delay.
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wr(e, E1000_CTRL, rd(e, E1000_CTRL) | E1000_CTRL_RST);
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for (int i = 0; i < 1000000; i++)
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if (!(rd(e, E1000_CTRL) & E1000_CTRL_RST))
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break;
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wr(e, E1000_IMC, 0xFFFFFFFF); // mask everything while we set up
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rd(e, E1000_ICR); // and clear whatever was pending
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wr(e, E1000_CTRL, rd(e, E1000_CTRL) | E1000_CTRL_SLU | E1000_CTRL_ASDE);
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read_mac(e);
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// The multicast table is undefined after reset. Left as it comes up, the
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// device accepts multicast traffic for addresses nobody asked for.
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for (int i = 0; i < 128; i++)
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wr(e, E1000_MTA + i * 4, 0);
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// Program our own MAC into the receive-address filter, with the valid bit.
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{
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uint32 lo = (uint32)e->mac[0] | ((uint32)e->mac[1] << 8) |
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((uint32)e->mac[2] << 16) | ((uint32)e->mac[3] << 24);
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uint32 hi = (uint32)e->mac[4] | ((uint32)e->mac[5] << 8) | (1u << 31);
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wr(e, E1000_RAL, lo);
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wr(e, E1000_RAH, hi);
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}
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if (rings_setup(e) != 0) {
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cprintf("e1000: no DMA memory for the rings\n");
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return -1;
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}
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wr(e, E1000_TIPG, 10 | (8 << 10) | (6 << 20)); // the manual's IEEE defaults
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wr(e, E1000_TCTL, E1000_TCTL_EN | E1000_TCTL_PSP |
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(0x10 << E1000_TCTL_CT_SHIFT) |
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(0x40 << E1000_TCTL_COLD_SHIFT));
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wr(e, E1000_RCTL, E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SECRC |
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E1000_RCTL_SZ_2048 | E1000_RCTL_LBM_NONE);
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// MSI where the part has it -- the 82574 and the rest of the PCIe
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// generation do -- and INTx otherwise. MSI-X is not offered: the 82574 in
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// MSI-X mode routes its causes through IVAR, which this driver does not
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// program, and its interrupts would go nowhere. If neither works the
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// network thread still collects frames on its tick.
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pci_irq_attach(d, e1000_intr, e, "e1000", 0);
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wr(e, E1000_IMS, E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_LSC);
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e->ready = 1;
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kinfo("e1000: %x:%x:%x:%x:%x:%x, link %s, irq %d (%s)\n",
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e->mac[0], e->mac[1], e->mac[2], e->mac[3], e->mac[4], e->mac[5],
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(rd(e, E1000_STATUS) & E1000_STATUS_LU) ? "up" : "down",
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d->irq_line, pci_irq_kind(d));
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return 0;
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}
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// Every 8254x that shares the register map above. See include/e1000.h for
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// where the IDs come from and why the PCIe parts are excluded.
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#define M(id) { E1000_VENDOR, (id), 0, 0 }
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static const struct pci_match e1000_match[] = {
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M(E1000_DEV_82540EM), M(E1000_DEV_82540EM_LOM),
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M(E1000_DEV_82540EP_LOM), M(E1000_DEV_82540EP),
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M(E1000_DEV_82540EP_LP),
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M(E1000_DEV_82541EI), M(E1000_DEV_82541EI_MOBILE),
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M(E1000_DEV_82541ER_LOM), M(E1000_DEV_82541ER),
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M(E1000_DEV_82541GI), M(E1000_DEV_82541GI_MOBILE),
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M(E1000_DEV_82541GI_LF),
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M(E1000_DEV_82544EI_FIBER), M(E1000_DEV_82544GC_COPPER),
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M(E1000_DEV_82544GC_LOM),
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M(E1000_DEV_82545EM_COPPER), M(E1000_DEV_82545EM_FIBER),
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M(E1000_DEV_82545GM_COPPER), M(E1000_DEV_82545GM_FIBER),
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M(E1000_DEV_82545GM_SERDES),
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M(E1000_DEV_82546EB_COPPER), M(E1000_DEV_82546EB_FIBER),
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M(E1000_DEV_82546EB_QUAD),
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M(E1000_DEV_82546GB_COPPER), M(E1000_DEV_82546GB_FIBER),
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M(E1000_DEV_82546GB_SERDES),
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M(E1000_DEV_82547EI),
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// The PCIe generation. 82574L is emulated by QEMU and is what this was
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// tested against; the others share its register map and NVM layout.
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M(E1000_DEV_82571EB_COPPER), M(E1000_DEV_82572EI_COPPER),
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M(E1000_DEV_82572EI), M(E1000_DEV_82573E),
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M(E1000_DEV_82573L), M(E1000_DEV_82574L),
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M(E1000_DEV_82583V),
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{ 0, 0, 0, 0 },
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};
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#undef M
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static const unsigned char *
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e1000_mac_op(struct device *dev)
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{
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struct e1000 *e = nic_of(dev);
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return (e && e->ready) ? e->mac : 0;
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}
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static int
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e1000_link_up(struct device *dev)
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{
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struct e1000 *e = nic_of(dev);
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return e && e->ready && (rd(e, E1000_STATUS) & E1000_STATUS_LU) != 0;
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}
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// Let go of the device, so a userspace driver can have it.
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//
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// The same hook virtio-gpu grew for H1, on a NIC. docs/architecture/devices.md's rule
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// is that the kernel keeps a minimal driver for everything on the path to a
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// shell -- and a network interface is not on that path, so this one may leave.
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//
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// "Letting go" is more than saying yes. The device is still bus-mastering into
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// descriptor rings this driver allocated, and the process about to claim it
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// will be handed those pages back by the arena. So the receiver and the
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// transmitter are switched off and the interrupt is masked *at the device*
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// before the handler is unregistered: masking after unregistering leaves a
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// window where a level-triggered line is asserted with nobody to clear it,
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// which is the failure docs/history/kernel.md section 13 is about.
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//
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// `ready` going false is what makes the class vtable safe afterwards --
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// transmit, receive and link_up all check it, so the stack sees an interface
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// whose link is down rather than one that swallows packets.
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static int
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e1000_release(struct pci_dev *d)
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{
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struct e1000 *e = 0;
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// Found by the device it is bound to. struct pci_dev carries no private
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// pointer -- this driver keeps its instances in a table and matches on
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// `pdev`, the same way e1000_attached() does.
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for (int i = 0; i < E1000_MAX_NICS; i++)
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if (nics[i].pdev == d) { e = &nics[i]; break; }
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if (!e || !e->ready)
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return 0; // never came up, or already let go
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e->ready = 0;
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wr(e, E1000_IMC, 0xFFFFFFFF); // no more interrupts from it
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wr(e, E1000_RCTL, 0); // stop receiving
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wr(e, E1000_TCTL, 0); // stop transmitting
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rd(e, E1000_STATUS); // post the writes
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pci_irq_detach(d, e1000_intr, e);
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// And take the interface out of the stack.
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//
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// Leaving it there is worse than it sounds. The netif keeps its address and
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// the route to its subnet, so the stack goes on choosing it -- and every
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// frame it sends reaches e1000_transmit, which now correctly refuses. The
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// packets stop and nothing reports an error, which is indistinguishable
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// from a driver in a process that does not work. It was mistaken for
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// exactly that for an afternoon.
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if (e->ndev)
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net_detach(e->ndev);
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cprintf("e1000: released to userspace; the interface is down\n");
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return 0;
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}
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// Hang the instance on the device the bus has just published. See the comment
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// on `attached` in include/dev/pci.h for why this cannot happen inside probe().
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static void
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e1000_attached(struct pci_dev *d, struct device *dev)
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{
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for (int i = 0; i < E1000_MAX_NICS; i++)
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if (nics[i].ready && nics[i].pdev == d) {
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dev->priv = &nics[i];
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nics[i].ndev = dev;
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return;
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}
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}
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// The whole of what the network stack sees of this driver.
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static const struct netdev_ops e1000_netdev_ops = {
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.transmit = e1000_transmit,
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.receive = e1000_receive,
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.mac = e1000_mac_op,
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.link_up = e1000_link_up,
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};
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const struct pci_driver e1000_driver = {
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.name = "e1000",
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.devname = "eth",
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.match = e1000_match,
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.ops = &e1000_netdev_ops,
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.probe = e1000_probe,
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.attached = e1000_attached,
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.release = e1000_release,
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};
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