7e8d5e2821
PCI drivers took their interrupt from INTERRUPT_LINE. On real hardware that is the 8259's number, not the IOAPIC pin the device is wired to (that is in ACPI _PRT, which needs AML), so nothing ever arrived. xHCI is entirely interrupt-driven, so the USB keyboard and a USB root would have hung even on a clean boot. Under QEMU the two numbers agree, which is why it never showed. - pci_irq_attach()/pci_irq_detach(): MSI, then MSI-X if the driver allows it, then INTx. The handler is registered before MSI is enabled, so no edge is lost. xHCI, e1000, r8169 and rtl8139 use it. - Lines 24-29 are MSI vectors. The LAPIC error vector moves from 19, which is a PCI pin on Intel chipsets, to 30. Nothing is placed at or above vector 64 (T_SYSCALL). - A storming line is masked and its handlers are polled instead of being left to eat the CPU. A level line that has had a handler for 2 s and never fired is polled every tick by a kernel thread. Tested in QEMU q35 with the root on a USB stick: xHCI and e1000e on MSI; then MSI disabled and INTx deliberately misrouted, where xHCI got zero interrupts and the root still mounted through the poller. i440fx INTx and the rtl8139 hand-over are unchanged. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HH7xukt4aaiGj1nQEAoQf1
71 lines
2 KiB
C
71 lines
2 KiB
C
#pragma once
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// x86 trap and interrupt constants.
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// Processor-defined exceptions:
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#define T_DIVIDE 0 // divide error
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#define T_DEBUG 1 // debug exception
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#define T_NMI 2 // non-maskable interrupt
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#define T_BRKPT 3 // breakpoint
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#define T_OFLOW 4 // overflow
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#define T_BOUND 5 // bounds check
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#define T_ILLOP 6 // illegal opcode
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#define T_DEVICE 7 // device not available
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#define T_DBLFLT 8 // double fault
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#define T_TSS 10 // invalid task switch segment
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#define T_SEGNP 11 // segment not present
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#define T_STACK 12 // stack exception
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#define T_GPFLT 13 // general protection fault
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#define T_PGFLT 14 // page fault
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#define T_FPERR 16 // floating point error
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#define T_ALIGN 17 // aligment check
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#define T_MCHK 18 // machine check
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#define T_SIMDERR 19 // SIMD floating point error
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// IRQ offsets
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#define T_IRQ0 32 // IRQ 0 corresponds to int T_IRQ
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#define IRQ_TIMER 0
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#define IRQ_KBD 1
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#define IRQ_COM1 4
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#define IRQ_MOUSE 12
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#define IRQ_IDE 14
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// 30, not xv6's 19. Vector T_IRQ0+19 is IOAPIC pin 19, which real chipsets
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// use for PCI; the LAPIC error interrupt would have shared it.
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#define IRQ_ERROR 30
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#define IRQ_SPURIOUS 31
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// System call interrupt number for legacy int 0x40 or 0x80 if used
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// although syscall/sysret is preferred for x64
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#define T_SYSCALL 0x40
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#ifndef __ASSEMBLER__
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struct trapframe {
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// Registers saved by trapasm.S
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uint64 rax;
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uint64 rbx;
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uint64 rcx;
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uint64 rdx;
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uint64 rbp;
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uint64 rsi;
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uint64 rdi;
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uint64 r8;
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uint64 r9;
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uint64 r10;
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uint64 r11;
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uint64 r12;
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uint64 r13;
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uint64 r14;
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uint64 r15;
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uint64 trapno;
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// Error code and info saved by hardware
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uint64 err;
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uint64 rip;
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uint64 cs;
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uint64 rflags;
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uint64 rsp;
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uint64 ss;
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};
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#endif
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